| 摘要 |
PURPOSE: To reduce the error of offset currents, and to increase an output voltage swithcing level by providing a current mirror circuit which supplies bias current to a transistor for buffering an input signal and a current mirror circuit for offsetting base currents. CONSTITUTION: When the magnitude of the collector current of a main transistor Tr21 is defined as Ic, base current 213 is represented by Ic/β(aboveβis the current gain of Tr), and emitter current 211 by Ic(β+1)/β. Current 211 is the collector current of a Tr22, and the magnitude of base current 212 is equal to Ic(β+1)/β<2> . On the other hand, Tr22 and Tr23 are of the same size to form a current offsetting circuit, and the base currents of the Tr23 and the Tr22 are the same. The magnitude of emitter current 214 of a Tr24 which supplies the base currents of the Tr22 and 23 is 2.Ic(β+1)/β<2> , and collector current 215 is 2.Tc/β. At this time, the ratio of surface area of the Tr 25 and 26 of a mirror circuit 29b is 2:1, and the ratio of input and output currents 215:216 is 2:1, and output current 216=Ic/βis applied to the base of the T21, and offset to be the same magnitude of the current 213.
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