发明名称 Method of manufacture of a cubic integrated circuit structure.
摘要 The method involves etching pores electrochemically through a monocrystalline n-Si wafer and filling them with conductive doped poly-Si, Al, Cu or amalgam components. The etching involves using the wafer as an electrode in a fluoride holding acid electrolyte. The wafer forms a supporting plate (24) on one main surface (22) of a first substrate (21) which carries contacts (23) for circuit components. Connection surfaces (25) are produced on the faces of the supporting wafer, having electrical continuity with the filled pores. The upper surface is brought together (37) with the underside (36) of a second substrate (31) which has corresponding connection surfaces (33) and is overlaid with another wafer (34) having similarly filled pores.
申请公布号 EP0666595(A1) 申请公布日期 1995.08.09
申请号 EP19950100373 申请日期 1995.01.12
申请人 SIEMENS AKTIENGESELLSCHAFT 发明人 HOENLEIN, WOLFGANG, DR.;SCHWARZL, SIEGFRIED, DR.
分类号 H01L23/12;H01L21/768;H01L21/98;H01L23/52;H01L25/065 主分类号 H01L23/12
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