| 发明名称 |
Semiconductor ROM device and method |
| 摘要 |
Integrated circuit memory with bitlines which cross each other in multiple place for symmetric capacitives coupling. Also read only memory with differential sense amplifier with an input to each half array of cells. Bits are stored complementarily in the two halves.
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| 申请公布号 |
US5440506(A) |
申请公布日期 |
1995.08.08 |
| 申请号 |
US19920930930 |
申请日期 |
1992.08.14 |
| 申请人 |
HARRIS CORPORATION |
发明人 |
LONGWAY, CHARLES W. T.;YOUNG, WILLIAM R. |
| 分类号 |
G11C7/06;G11C7/14;G11C8/16;G11C17/12;(IPC1-7):G11C17/00 |
主分类号 |
G11C7/06 |
| 代理机构 |
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代理人 |
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| 地址 |
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