| 摘要 |
An addressing circuit for controlling an address in order to correct an error in case of recording digital data transmitted from a computer on the basis of a DDS (Digital Data Stage) format in a digital audio tape. The addressing circuit has a buffer memory connected to receive digital data transmitted from a host computer, for storing and accessing the digital data supplied by a given control signal, a control signal generating circuit connected to receive a start instruction and a start address from the exterior, for generating a control signal of the buffer memory, and a C3 encoding circuit connected to receive the control signal of the control signal generating circuit, for generating a parity of two symbols with respect to 44 data symbols on the basis of a DDS format.
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