PLL WITH FREQUENCY SYNTHESIZER CIRCUIT

摘要

The synthesizer comprises an oscillator (20) generating a reference frequency, a divider (21) dividing the reference frequency, a phase detector (22), a charge pump circuit (25) for converting the output signal of the phase detector into an analog signal, a low pass filter (26), a voltage controlled oscillator (VCO)(27), a programmable counter (23) for dividing the output frequency of the VCO, and a power save block (28) connected between the programmable counter and the VCO for regulating the output signal of the VCO according to the output signal of a micom (24) to control operation of the programmable counter.