| 摘要 |
<p>PURPOSE: To provide a dual port memory device capable of improving an integration degree by reducing an area occupied by a peripheral circuit. CONSTITUTION: A SAM port 46 is shared by memory blocks 40 and 42 and a RAM port 48 is shared by the memory blocks 40 and 44. Thus, the RAM port 48 is constituted of sense amplifiers 52, 54, and 56, switching means N7-N10 for selectively connecting the bit line pair BL bar BL of the memory block and the sense amplifiers 52, 54 and 56 and the switching means N11 and N12 for connecting the bit line pair BL bar BL selected and connected to the sense amplifiers 52, 54 and 56 and a data input/output line pair I/O bar I/O. Conventionally, only the SAM port is shared by the two memory blocks and the RAM port is provided for one each in the respective memory blocks. Thus, by sharing the RAM port as well, the number of ports is reduced and the integration degree is improved.</p> |
