Frequency multiplier based upon ring oscillator

摘要

The frequency multiplier circuit has a ring oscillator circuit (R) with its outputs coupled to a summation stage. The ring oscillator is formed by a number of delayed switching stages (TA-TE) each of which produce a square wave output delayed relative to the input. The oscillator receives a reference input (FR). The delayed outputs are combined by a summary circuit (SU) and the output frequency is a multiple of the number of oscillator stages, which is an odd number.