发明名称 Double poly process with independently adjustable interpoly dielectric thickness
摘要 The present invention relates to a double poly MOS structure and a method for polysilicon capacitor formation which allows for independent adjustment of an interpoly oxide layer without affecting thickness of the gate oxide layer. In an exemplary embodiment, a first oxide layer is formed above a polysilicon layer. A second oxide layer is subsequently formed on the substrate to establish a gate oxide in an active area of the transistor. As a result, the interpoly oxide layer is formed by a combination of the first and second oxide formations, while the gate oxide layer is formed by only the second oxide formation. Thus, the thickness of the interpoly oxide layer can be adjusted by increasing or decreasing the thickness of the first oxide formation without changing the thickness of the gate oxide layer.
申请公布号 US5434098(A) 申请公布日期 1995.07.18
申请号 US19940253327 申请日期 1994.06.03
申请人 VLSI TECHOLOGY, INC. 发明人 CHANG, KUANG-YEH
分类号 H01L21/02;H01L21/822;(IPC1-7):H01L21/823 主分类号 H01L21/02
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