发明名称 SEMICONDUCTOR MEMORY AND FABRICATION THEREOF
摘要 PURPOSE:To constitute a four-value memory having planar cell structure wherein the fluctuation of ON current is suppressed in each memory element. CONSTITUTION:In order to form a memory element 12a of first state for a silicon wafer on which memory elements of planar cell structure are formed, a resist pattern 26 having an opening 24a including the entire channel region is formed and used as a mask when boron ions are implanted into the substrate through a word line 6. In order to form a memory element 12b of second state and a memory element 12c of third state, a resist pattern 28 having an opening 24b including the entire channel region and an opening 24c including one side part of channel width are then formed and used as a mask, along with a word line 6, when borons are implanted into the surface of substrate at an inclination of 30-60 deg. from the vertical direction, i.e., by oblique rotary ion implantation. It is then heat treated so that the impurities are diffused from the side part thus forming a diffused region extending by about one third of the channel width.
申请公布号 JPH07176635(A) 申请公布日期 1995.07.14
申请号 JP19930344346 申请日期 1993.12.17
申请人 RICOH CO LTD 发明人 ISHIDA KAZUTAKA
分类号 G11C16/04;H01L21/82;H01L21/8246;H01L27/112;H01L27/118 主分类号 G11C16/04
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