Semiconductor memory device esp. DRAM

摘要

Semiconductor memory device has a matrix array of memory cells, each having a transfer transistor, with a gate electrode (13), a gate insulation film (12), a source region (S) and a drain region (D), and a charge storage capacitor, formed by a memory mode, a dielectric film (21) and a plate electrode (22). The novelty is that the memory node has (a) a cylindrical or box-shaped lower electrode (16) which is located on the transistor and on an insulating layer (14) lying on the transistor and which is connected through the insulating layer (14) to the source or drain region (S/D); and (b) an upper electrode (19) lying on and joined to the lower electrode (16). Also claimed are processes for prodn. of the above device.