发明名称 Non-volatile memory cell having hole confinement layer for reducing band-to-band tunneling
摘要 An arrangement for reducing the erratic operation of a non-volatile memory cell caused by the accumulation of holes at a specific location within the cell during the electrical erasing of the cell includes a layer of hole confinement material positioned at the specific location the holes accumulate for containing the holes in a specific area. The arrangement also includes an arrangement for removing the holes from the containment area. A method of reducing the erratic operation of a non-volatile memory cell caused by the accumulation of holes at a specific location within the cell during the electrical erasing of the cell includes the step of providing a layer of hole confinement material positioned at the specific location the holes accumulate for containing the holes in the layer of hole confinement material.
申请公布号 US5432749(A) 申请公布日期 1995.07.11
申请号 US19940233057 申请日期 1994.04.26
申请人 NATIONAL SEMICONDUCTOR CORPORATION 发明人 SETHI, RAKESH B.
分类号 H01L29/32;H01L29/788;(IPC1-7):G11C16/00 主分类号 H01L29/32
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