发明名称 A METHOD OF PLANARIZING A DIELECTRIC LAYER OF AN INTEGRATED CIRCUIT
摘要 <p>A method of forming at least one planarized layer of dielectric material on an integrated circuit includes the steps of extrusion coating a layer of dielectric material over a surface of the integrated circuit. The surface of the layer of dielectric material is then levelled, preferably by thermally flowing the dielectric material. The layer of dielectric material is then cured, preferably by using thermal energy. Multiple, planarized dielectric layers can be formed by repeating the process after each formation of an interconnect level.</p>
申请公布号 WO1995017006(A1) 申请公布日期 1995.06.22
申请号 US1994008753 申请日期 1994.08.05
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