| 摘要 |
A family of high performance logic circuits. Each circuit uses one or more NMOS transistors characterized by controlled threshold voltages. The threshold voltage is determined by changing the doping profile of the gate of that transistor. When each circuit is at its stable state, the current through its controlled-threshold NMOS transistor is limited by a characteristic leakage current of that transistor if its input signal is at a low logic level. The invention is demonstrated in an inverter, a ring-oscillator, an NAND circuit, an NOR circuit, and tri-state logic circuits.
|
