| 摘要 |
1,250,511. Electric digital calculators; data storage. BELL PUNCH CO. Ltd. 16 Jan., 1969 [19 Jan., 1968], No. 3059/68. Headings G4A and G4C. A number register comprises four shift registers, corresponding stages of which store different bits of a decimal digit, and buffer bistables 8-11 connected in a recirculating loop, the bi-stables 8-11 being connected between the complementary outputs W-Z and inputs A-D of the shift registers. Each shift pulse applied to the shift registers and bi-stables 8-11 on line 17 occurs between a decimal digit- - representing train of equal-valued pulses clocked in at gate 25. The bi-stables 8-11, together with NOR gates comprising transistors TR1- TR4 act as a gated counter, bi-stable 8 changing state with each input pulse, and the gates being controlled by complementary bi-stable outputs a-d so that the bi-stables 9-11 assume successive states in a reflected binary code. The gate comprising TR3 suppresses the six redundant code combinations. The complementary outputs a-d are applied to a decimal decoder. Addition and subtraction of a number stored in a similar number register may be performed by inter-register gating circuits to which input 20 is connected via a pulse generator. |
