发明名称 VERNIER STRUCTURE FOR MEASURING OVERLAP ACCURACY AND MEASURING METHOD OF OVERLAP ACCURACY
摘要 <p>PURPOSE:To reduce the stepped section of vernier, and to suppress the measurement error of overlap accuracy. CONSTITUTION:In vernier for measuring overlap accuracy for with a pre-process in a photolithographic process, a pattern in the pre-process as a main scale 11 is formed by a punching pattern, and a vernier 13 is arranged in a punching region.</p>
申请公布号 JPH07142543(A) 申请公布日期 1995.06.02
申请号 JP19930189025 申请日期 1993.06.30
申请人 SONY CORP 发明人 HIKICHI KUNIHIKO
分类号 G01B11/00;G03F7/20;H01L21/02;H01L21/027;H01L21/66;H01L21/68;(IPC1-7):H01L21/66 主分类号 G01B11/00
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