| 摘要 |
<p>Selective salicidation of source/drain regions of a transistor is accomplished by performing an implant into a first plurality of transistor source/drain regions (22) on an integrated circuit. As a result of the implant, doping density of the first plurality of transistor source/drain regions (22) is greater than doping density of a second plurality of transistor source/drain regions (21) on the integrated circuit. The integrated circuit is heated to a heating temperature sufficient to produce oxidation regions immediately over the first plurality of transistor source/drain regions (22) and the second plurality of transistor source/drain regions (21). The heating temperature is chosen so that the oxidation regions immediately over the first plurality of transistor source/drain regions (22) are thicker than the oxidation regions immediately over the second plurality of transistor source/drain regions (21). A metal layer is formed over the first plurality of transitor source/drain regions (22) and the second plurality of transistor source/drain regions (21). The metal layer is annealed at a temperature such that the metal reacts to form metal-silicide (49) over the second plurality of transistor source/drain regions (21), but not over the first plurality of transistor source/drain regions (22). The unreacted metal is stripped off over the first plurality of transistor source/drain regions (22).</p> |
