发明名称 MONITOR CONTROLLER
摘要 <p>PURPOSE:To eliminate the inverse of time to time after a second order and to set a time lag to be a minimum by means of an interruption processing judging whether time data of an internal clock is delayed or advanced compared to time data of a master clock device at the time of input for a proofreading pulse signal for time synchronization. CONSTITUTION:The proofreading pulse signal inputted from the proofreading pulse output part for time synchronization 17 of the master clock device 11 is processed as the interruption input signal of a microprocessor part 15 in a monitor controller 13. Every correct time which can previously set is decided for the proofreading pulse signal for time synchronization 17. When the microprocessor part 15 recognizes time passed from n-minutes t1-seconds by prescribed time, for example, it shifts to a step reading time data from the time data output part 12 of the master clock device 11 through a time data input part 14. Then, a time synchronization preprocessing such as the generation of time data for proofreading the self internal clock 6 is executed until a next interruption signal is inputted. Then, the next interruption input signal is received in such a state.</p>
申请公布号 JPH07121408(A) 申请公布日期 1995.05.12
申请号 JP19930287707 申请日期 1993.10.22
申请人 TOSHIBA CORP 发明人 WATANABE TAKESHI;TODA TAKEO
分类号 G06F11/30;G06F1/14;H02J13/00;H04L7/00 主分类号 G06F11/30
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