FOLDED BIT LINE TYPE DRAM CELL ARRAY

摘要

The folded bit-line cell arranging method minimizes the wasted active area on the surface of the semiconductor substrate. The cell array comprising the word line and the bit line is arranged with the upper/lower cells shifted 1/2 pitch from each other. The word line expands in the first direction while the bit lines connected to the sense amplifier expand in the second direction which is perpendicular to the first direction. The active area for each memory cell is positioned in the oblique pattern.