发明名称 METHOD FOR ERASURE OF MEMORY CELL AND NONVOLATILE MEMORY ARRAY
摘要 <p>PURPOSE: To remove reading error due to an overerased cell by impressing a flash erasing pulse to the cell of EEPROM array and then impressing a flash programming pulse. CONSTITUTION: A flash erasing pulse Vee is strong enough to overerase a cell 10. A flash programming pulse Vpp impressed to a control gate 14 is provided with the same voltage as used for programming the individual cell 10. The intensity of an electric field pulse for program adjacent to a floating gate 13 is controlled by impressing a bias voltage Vbb to one of the source/drain areas 11/12 of the cell. The bias voltage Vbb controls the energy level of the field pulse for program, while the threshold voltage of the cell 10 controls to move to the floating gate 13 only the electric charge that is sufficient for holding a positive value less than the scheduled word line selective voltage Vcc.</p>
申请公布号 JPH0793983(A) 申请公布日期 1995.04.07
申请号 JP19910082441 申请日期 1991.04.15
申请人 TEXAS INSTR INC <TI> 发明人 JIYOBANI SANTEI
分类号 G11C17/00;G11C16/02;G11C16/14;H01L21/8247;H01L27/115;(IPC1-7):G11C16/06 主分类号 G11C17/00
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