发明名称 Microcomputer having an error-correcting function based on a detected parity error
摘要 A microcomputer having an error correction function includes a summing function for calculating a total-sum of data associated with a block of stored data, a total-sum changing function for calculating a new total sum of data associated with the block of stored data when new data is stored in the block of stored data, the new total sum of data being based on an equation Snew=Sold+Xnew-Xold, where, Xnew denotes new data replacing old data Xold, and Sold denotes an old total sum of data associated with the block of stored data before the new data is stored, a parity adding function for calculating a vertical parity associated with the new data, a parity error detecting function for detecting error in the vertical parity, and an error correction function for correcting data stored at an address where an error has been detected by subtracting data stored at all addresses of the block of stored data other than the data stored at the address where the error has been detected from the new total sum of data associated with the block of stored data.
申请公布号 US5404495(A) 申请公布日期 1995.04.04
申请号 US19910788884 申请日期 1991.11.07
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 YONEDA, HIROSHI
分类号 G06F11/10;(IPC1-7):G06F11/10;G06F11/34;G06F11/00;H03M13/00 主分类号 G06F11/10
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