| 摘要 |
PURPOSE:To provide the frequency synthesizer, which is stabilized in a synchronous state and can be switched at high speed at the time of frequency switching, by using a phase comparator equipped with high phase comparative sensitivity and variable sensitivity and a loop filter equipped with a variable time constant. CONSTITUTION:When the frequency synthesizer is stably oscillated at a certain frequency, the phase comparative sensitivity of a sensitive variable phase comparator 5 is high, and the time constant of a time constant variable loop filter 7 is large. In order to switch a frequency, a new frequency division number N2 is set to a comparative frequency divider 11, an enable signal is transmitted, at the same time, the phase comparative sensitivity of the sensitivity variable phase comparator 5 is lowered, the time constant of the loop filter 7 is set short and afterwards, the comparative frequency divider 11 is operated. At such a time, phase difference between two input signals inputted to the phase comparator 5 is stepwise changed. Since the sensitivity of the phase comparator 5 is low, even when the phase difference of input signals is large, it is within a linear operation range. Therefore, PLL is speedily converged near a target frequency. |
