| 摘要 |
PURPOSE:To provide the frame synchronization system in which frame synchronization is set without provision of a pseudo timing generating section by applying variable control to a bit error setting value in response to a bit error with respect to the frame synchronization system to continue the synchronization timing in a processing section applying reception processing to serial data from a satellite. CONSTITUTION:A synchronization detection section 11 detects a synchronization code of a known fixed pattern added to an input PCM signal from a terminal 1 in the unit of frames based on a bit error allowable value of a bit error allowable value setting section 13 and generates a synchronization timing signal synchronously with an input timing of the synchronization code and provides bit error information. A bit error measurement section 12 measures a bit error rate based on the bit error information and provides a bit error allowable value control signal in response to the measured value. A bit error allowable value setting section 13 applies variable control to an output bit error allowable value based on the bit error allowable value control signal. |
