| 摘要 |
A semiconductor device of this invention includes a memory cell matrix having a plurality of memory cells arranged in a matrix form, a group of bit lines connected to the memory cells and disposed for respective columns of the memory cell matrix, and a testing circuit for effecting the test to check whether the memory cell matrix functions correctly or not. The testing circuit includes a first potential supplying circuit having an output terminal connected to even-numbered bit lines of the bit line group to supply a potential which is as high as 9V to the even-numbered bit lines and a second potential supplying circuit having an output terminal connected to odd-numbered bit lines of the bit line group to supply a potential which is as low as 0V to the odd-numbered bit lines.
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