发明名称 HIGH FREQUENCY CLOCK GENERATING CIRCUIT
摘要 <p>PURPOSE:To generate a high frequency clock by using a low speed crystal oscillator. CONSTITUTION:In the high frequency clock generating circuit provided with a reference oscillator 1, a phase variable circuit section 2 receiving a reference clock from the reference oscillator 1 and providing an output of (2<n>-1) sets of clocks having a phase difference of pi/2<n> (n=1, 2, 3...) and n-sets of logic circuit sections in cascade connection by n-stages, an m (m=1, 2,...n-1)-th stage logic circuit section receives 2<n+1-m>) sets of clocks having a phase difference of pi/2<n+1-m> each, outputs 2<n-m> sets of clocks having a multiple of frequency of the received clock and having a phase difference of pi/2<n-m> each by comparing the two clocks having a phase difference of pi/2 and 2<n> sets of clocks from the reference oscillator 1 and the phase variable circuit section 2 are inputted to 1st stage logic circuit sections 3-6.</p>
申请公布号 JPH0779141(A) 申请公布日期 1995.03.20
申请号 JP19930221707 申请日期 1993.09.07
申请人 HITACHI LTD;HITACHI MICOM SYST:KK 发明人 YOSHIMUNE AKIRA
分类号 G06F1/08;H03K5/00;(IPC1-7):H03K5/00 主分类号 G06F1/08
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