| 摘要 |
The circuit comprises a comparing section (10) for determining level between output ports (Uk,Vk) of a mapping circuit (10) and input ports of samplers (Sa,Sb), a logic gate section (111) for combining output signals (A0-A3) of the comparing section (10) logically to output the result to D/A converter (112), and level discriminators (11u,11v) having the D/A converter (112) which converts a digital output signal of the logic gate section (111) into an analog signal.
|
