| 摘要 |
Suppression of charge loss and hot carrier degradation in EEPROMs and EPROMs, and of instability in the polysilicon pull-up resistors associated with SRAMs is achieved by the inclusion of at least one layer of silicon-enriched oxide in the MOS structure. In such MOS structures, the silicon-enriched oxide layer may be disposed immediately beneath the interlayer dielectric layer, or immediately beneath the inter-metal oxide layer, or immediately beneath the passivation layer, or in any combination of these locations. Each silicon-enriched oxide layer preferably contains at least about 1017 per cm3 dangling bonds. |
