| 摘要 |
A programmable logic circuit for deriving any selected combinational logic function of a plurality of input logic signals, a particular logic function being established by programming signals supplied to the logic circuit. The circuit is a branching tree structure of successive gating levels, each gating level receiving a respective input logic signal and including one or more pairs of logic switches, each such gating switch being a bipolar transistor or a CMOS pair. Each pair of gating switches in a given gating level is coupled to one of the gating switches in the preceding gating level. A programming level following the highest gating level includes respective pairs of logic switches for the respective programming signals, each such pair driving one of the gating switches in the highest gating level. The logic circuit can serve as a prototype which can be programmed and reprogrammed during debugging of a programmable logic device (PLD) in which it is included. All combinational logic functions (AND, OR, XOR, etc.) can be established by appropriate logic values of the programming signals. <IMAGE> |
