| 摘要 |
1299849 Passivated semi-conductor devices HITACHI Ltd 30 Nov 1970 [1 Dec 1969] 56875/70 Heading H1K Channel-stopping between spaced areas of a passivated semi-conductor surface is achieved by forming a projection or groove on/in the surface to expose a crystal plane upon which the passivating film will induce a greater number of carriers than on the plane of the major surface. The embodiments disclose silicon devices formed in wafers with {100} major faces and wherein the grooves or projection have some walls in {111} planes, the passivation being pyrolytic or thermal oxide or silicon nitride or oxynitride. The diode shown has a channel stopping groove completely surrounding its p-type region. Similar grooves (or equivalent projections) may completely surround components in integrated circuits to provide surface isolation, but the embodiment given merely uses a short groove to interrupt channelling under an interconnection track. In a further embodiment a groove is provided intermediate the source and drain region of an IGFET to considerably raise its threshold voltage. |
