THREE-DIMENSIONAL SELECTION TECHNIQUE FOR VARIABLE THRESHOLD INSULATED GATE FIELD EFFECT TRANSISTOR MEMORIES

摘要

A memory array is made up of rows and columns of memory elements. Each memory element includes a known type of variable threshold insulated gate field effect transistor characterized by electrically controllable conduction thresholds established by potentials applied between the respective gate electrodes and the substrate on which the transistors are formed. A desired memory element is selected by first applying an enabling voltage to the drain electrodes of all transistors in a group of columns including the column containing the desired element. A second enabling voltage is then applied to the gate electrodes of all transistors in the row containing the desired memory element. A third voltage applied to the column containing the desired transistor and the corresponding columns in each group of columns selects the desired transistor.