发明名称 LOGIC CIRCUIT
摘要 PURPOSE:To enable the characteristic test of a register file to be easy and positive. CONSTITUTION:Master latch groups 1-4 latch either the normal input signal from input terminals 10-13 and the input signal for testing from input terminals 16-19 according to the test instruction signal from an input terminal 20. A selector 9 outputs either the output signal for testing from the master latch groups 1-4 or the output signal for testing from a slave latch group 8 according to the test output selection signal from an input terminal 21.
申请公布号 JPH0755889(A) 申请公布日期 1995.03.03
申请号 JP19930220546 申请日期 1993.08.11
申请人 NEC CORP 发明人 ANDO YASUHIRO
分类号 G01R31/28;G06F11/22 主分类号 G01R31/28
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