| 摘要 |
PURPOSE:To obtain a proper signal level without changing a signal arrangement. CONSTITUTION:Upper-part terminals 15 and lower-part terminals 16 in which connections to contact parts at connectors are set in an insertion depth are formed in two stages on a board 12 in the insertion direction into the connections to be connected. Then, series resistances RS are connected across upper-part signal terminals 15a and lower-part signal terminals 16a in output signal line systems for individual memory ICs 13 out of the upper-part terminals 15 and the lower-part terminals 16.
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