| 摘要 |
A pulse signal generator comprising a plurality of stages of delay gates connected in series to one another for delaying input signals fed to input terminals; first differential connection circuits interposed respectively between the stages of the delay gates so as to transmit, at a predetermined timing, the signals passed through the delay gates; first and second input lines for supplying the output signals of the first differential connection circuits to a cascode amplifier; and second differential connection circuits each consisting of a pair of transistors which are supplied with the same input signals as those fed to each pair of transistors constituting the first differential connection circuit, wherein the second differential connection circuit is connected to the first and second input lines in such a manner that the outputs of the transistors thereof become inverse in polarity to the outputs of the transistors of the corresponding first differential connection circuit. The pulse signal generator is capable of reducing a formable minimum pulse duration while suppressing occurrence of jitters even in a superhigh-speed operation. And its prevents delay time variations that may otherwise be caused by variations in the values of resistors formed in an integrated circuit, thereby maintaining the signal delay time constant per delay gate. |
