发明名称 CIRCUIT INTERPOLATEUR.
摘要 A fast time base generator for an automatic test system comprises a generator of fast address configurations (30) and a divider circuit (32) which divides the fast address configurations into a set of slower address configurations, a local generator circuit (15) which comprises a set of signal generating circuits operating at the lower frequency of the slower address configurations so as to provide signals of lower frequency, and a fast format generator (66) which uses the signals of lower frequency in order to furnish a signal of high frequency which is applied to a device under test (21). <IMAGE>
申请公布号 FR2684207(B1) 申请公布日期 1995.02.10
申请号 FR19920010362 申请日期 1992.08.28
申请人 TERADYNE INC 发明人 REICHERT PETER ADDISON;BROWN BENJAMIN JOSEPH
分类号 G01R31/319;G06F17/17;G06J1/00;H03M1/82;(IPC1-7):G06F13/38;G06F15/353 主分类号 G01R31/319
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