| 摘要 |
<p>PURPOSE:To prevent missing of data due to changeover by providing two memories having a time difference between the write and the read respectively and switching the data after the read data of the two memories are made in phase. CONSTITUTION:An input data signal 101 passes through a memory 1 and a delay circuit 3 where the signal is delayed and the delayed signal is inputted to a memory 2. The write of the memories 1, 2 is started with write address reset pulses corresponding to each other from a write pulse generating circuit 4 synchronously with a transmission clock 103. The written input data signal is started to be read by read address reset pulses corresponding to each other from a read pulse generating circuit 5 synchronously with an in-equipment block 104, read data from the memory 1 are delayed by a delay circuit 7 and inputted to a selection circuit 8. The read data from the memory 2 are inputted directly to the circuit 8. A same delay is given to the circuits 3, 7. The circuit 8 selects one of both the read data by a selection signal from a control circuit 6 to provide an output of output data 102.</p> |
