| 摘要 |
PURPOSE:To enable free programming by not clearing the value of the status register for received data with the reception permission bit of the control register to eliminate the restriction of the readout order of a status register in relation to the cleaning of the reception permission bit of a control register. CONSTITUTION:In this series data transfer device 101, error information in the status register 103 is not reset to '0' even when the reception permission bit of the control register 102 is reset to '0'. Namely, a reset signal generating circuit 108 which generates the reset signal for the status register 103 does not generate the reset signal even when the reception permission bit of the control register 102 is reset to '0'. Thus, even if the reception permission bit of the control register 102 is reset to '0', the reset signal for the status register 103 is not generated, so the information in the status register 103 is prevented from being broken. Consequently, the resetting of the reception permission bit and a read of the status register are performed independently of each other. |
