发明名称 PACKAGING CIRCUIT IN IMAGE PROCESSOR
摘要 <p>PURPOSE:To provide a packaging circuit capable of being miniaturized and enhancing reliability by equipping a driver circuit which converts image data inputted from the outside into parallel signals of permutation driven serially in accordance with serial same data and outputs the parallel signals in parallel from the respective output pads. CONSTITUTION:In the packaging circuit of an image processor, a driver IC5 is so arranged horizontally that long sides 3, 4 in the longitudinal direction are parallel to the rows of image processing elements 1. Width of the packaging circuit in the longitudinal direction for the rows of the elements is miniaturized. Output pads 2a, 2b are arranged in series in both sides of the long sides 3, 4 in the same direction. Therefore both sides of the long sides 3, 4 of the driven IC5 are effectively used to arrange the output pads. As a result, the need for concentrating the output pads 2a, 2b on only a conventional one long side is eliminated. A factor for inhibiting densification in a packaging structure is canceled. The number of the output pad formed in one driver IC5 is more increased and densification of the driver IC5 is enabled.</p>
申请公布号 JPH0717072(A) 申请公布日期 1995.01.20
申请号 JP19930164773 申请日期 1993.07.02
申请人 TOSHIBA CORP 发明人 KOBAYASHI KAZUO
分类号 B41J2/345;B41J2/44;B41J2/45;B41J2/455;H04N1/024;(IPC1-7):B41J2/44 主分类号 B41J2/345
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