| 摘要 |
In an access circuit (31) of a background picture generating part (22), cycle patterns are stored in an access register (40). Access commands read out are converted into control signals by a decoder (41). Addresses on a VRAM (12) which are assigned to necessary image data are generated by an address selector (42), and are fed to the VRAM (12). The image data are read from the VRAM (12) according to the control signals and the addresses, and they are stored in registers (33-36). Image data are read from the registers (33-36) by output circuits (37, 38), and picture element data are generated and outputted from the output circuits (37, 38). Thereby, alteration of the cycle patterns of the VRAM access can be treated flexibly which are resulted from alteration of display setting such as of the number of colors of the image data, the reduction ratios and the access frequencies. Further, according to the quantities of the image data and the access frequencies of the respective background pictures, the storages of the image data can be adjusted between a plurality of the VRAMs.
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