Interface circuit and voltage booster circuit including such circuit.

摘要

Such an interface circuit makes it possible, from an input signal, varying between a reference level (VR) available on a first terminal (QR) and a first voltage level (V1), to deliver an output signal varying between this reference level (VR) and a second voltage level (V2) available on a second terminal (Q2). It includes two invertors (INV1, NV2) the response times of which are such that the two transistors of the third branch (P5, N6) are never active simultaneously. Thus, short-circuiting them during the transient regime does not create any current peak; it is therefore possible to dimension them substantially with respect to the other transistors of the circuit without degrading the efficiency thereof. Applications: interface circuits for heavy-current applications, and in particular voltage step-up circuits allowing low- and high-voltage circuits to be interfaced. <IMAGE>