发明名称 Master slice type integrated circuit device and method of using it.
摘要 <p>This invention is to realize a final circuit by wiring only the top layer depending on the individual circuits, by fabricating a master slice in the step of up to forming plural semiconductor elements such as transistors on a semiconductor substrate, forming a lower layer of versatile wiring pieces thereon, and forming contact holes thereon. In this way, since the step just before formation of the top layer wiring can be carried out regardless fo the features of individual circuits, preliminary mass productions are possible, and final products can be completed only by forming the wiring of the top layer depending on the requirements of the users. Accordingly, it is applicable to a wide variety of products, and the term for development and manufacture can be tremendously shortened.</p>
申请公布号 EP0314376(B1) 申请公布日期 1995.01.04
申请号 EP19880309787 申请日期 1988.10.19
申请人 MATSUSHITA ELECTRONICS CORPORATION 发明人 FUKUI, YUKO;OHTANI, KATSUHIRO;MIYAMOTO, HIROYUKI;NISHIURA, MASAO;CHIMURA, MORIYUKI
分类号 H01L23/522;H01L23/528;(IPC1-7):H01L23/52;H01L27/04 主分类号 H01L23/522
代理机构 代理人
主权项
地址