| 摘要 |
<p>The invention provides for the prefetching of information, such as instructions and operands, in advance of a processor needing the information. In one arrangement, a prefetch unit receives the same instruction stream as the processor but the prefetch unit is run at a faster clock speed than the processor allowing the prefetch unit to run ahead of the processor in the instruction stream and to prefetch information in advance of the processor needing the information. Also, the prefetch unit can request instructions and operands from a first level (L1) cache and the L1 cache can send the requested instructions and operands to the prefetch unit and automatically stores the requested instructions and operands until needed by the processor. By prefetching information, the prefetch unit improves processor performance by reducing the number of cache misses and by reducing memory latency.</p> |
