Asymmetrical alternate metal virtual ground EPROM array

摘要

An asymmetrical alternate metal virtual ground (AAMG) EPROM array utilizing an asymmetrical stacked gate cell with an N- source and four additional select lines is provided. The unintentional write problem associated with the conventional AMG EPROM array is eliminated by utilizing a high select transistor bias voltage and the asymmetrical cell. Soft write of the selected cell is minimized by biasing the source terminal during a read operation. Thus, bit line bias can be significantly increased to enhance the cell current and the memory performance without effecting data retention.