发明名称 Improved pad ring router
摘要 A method sizes routing channels used to route pads to a logic core. Six channels are defined. The six channels include a first special channel, a second special channel, a left channel, a right channel, a bottom channel and a top channel. The first special channel is immediately below the logic core and within a span of the logic core. The second special channel is immediately above the logic core and within a span of the logic core. The left channel is adjacent to a left side of the logic core, the first special channel and the second special channel. The right channel is adjacent to a right side of the logic core, the first special channel and the second special channel. The bottom channel is adjacent to a bottom side of the left channel, the first special channel and the right channel. The top channel is adjacent to a top side of the left channel, the first special channel and the right channel. Pads are positioned at a top side of the top channel, at a bottom side of the bottom channel, at a left side of the left channel and at a right side of the right channel. After performing a global route through the six channels, the six channels are re-sized based on channel density resulting from channel routing each of the six channels. The re-sizing includes repositioning the pads.
申请公布号 US5377125(A) 申请公布日期 1994.12.27
申请号 US19920843493 申请日期 1992.02.28
申请人 VLSI TECHNOLOGY, INC. 发明人 HUI, SIU-TONG;ASHTAPUTRE, SUNIL
分类号 G06F17/50;(IPC1-7):G06F15/60 主分类号 G06F17/50
代理机构 代理人
主权项
地址