发明名称 A METHOD FOR MULTIPLYING THE FREQUENCY OF A DIGITAL SIGNAL AND A FREQUENCY MULTIPLIER CIRCUIT
摘要 The invention relates to a method for multiplying the frequency of a digital signal by a predetermined multiplier and a frequency multiplier circuit. The method comprises generating from an input signal (CLK1) of a first frequency an output signal (CLK3) of a second frequency, the ratio between said frequencies corresponding to said frequency multiplier. In order that clock frequencies higher than the basic clock might be avoided and that the phase variation of the signal of the multiplied frequency might be controlled, a predetermined number of pulses is generated in the output signal (CLK3) per one transition of the input signal (CLK1), and additional pulses (E) are added to the output signal thus generated at predetermined intervals in such a manner that the additional pulses are generated at predetermined positions in relation to the pulses generated in response to said transitions.
申请公布号 WO9429959(A1) 申请公布日期 1994.12.22
申请号 WO1994FI00257 申请日期 1994.06.15
申请人 NOKIA TELECOMMUNICATIONS OY;LAINE, SEPPO 发明人 LAINE, SEPPO
分类号 H03K5/00;(IPC1-7):H03K5/13 主分类号 H03K5/00
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