| 摘要 |
A stored data protection apparatus for an electronic device has a CPU (20) and a volatile memory (21) controlled by the CPU for storing data therein. Both of the CPU and the volatile memory ace supplied power voltage from a main battery (22) in normal operation of the device. The volatile memory as supplied power voltage from a back-up battery (23) when the main battery is removed from the device. The apparatus has a switch (29) operable in first and second positions, taking the first position in the normal operation of the device, and being switched from the first position to the second position when the main battery is removed from the device, a circuit (44, 48) for inhibiting the CPU to access the volatile memory when the switch is in the second position, and a circuit (38, 34, 42, 43) for releasing the inhibition of the CPU by the inhibiting circuit when the switch is switched from the second position to the first position.
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