DIGITAL SAMPLE AND HOLD PHASE DETECTOR

摘要

The digital sample and hold phase detector to compare the phase relationship between input pulses and a high frequency reference clock comprises a digital counter arrangement coupled to count the high frequency reference clock to produce a digital ramp signal and a digital sampling arrangement coupled to at least the input pulses and an output of the counter arrangement to enable the input pulses to sample the digital ramp signal and produce a digital phase difference signal.