| 摘要 |
<p>A semiconductor flash memory device is provided to improve the operation reliability of a flash memory device by removing a programming error due to an interference. First and second bit lines are intersected with N number of word lines. A unit cell is arranged at every point at which the first and second bit lines are intersected with the N number of word lines. In case addresses of 1st to 2N-th are assigned to N number of unit cells, an N-th address is assigned to a point at which the first word line and the second bit line are intersected, an (N+1)-th address is assigned to a point at which the second word line and the first bit line are intersected, a 2nd address is assigned to a point at which the second word line and the second bit line are intersected, so that the addresses assigned to the unit cells are increased in a diagonal direction.</p> |
