发明名称 VIDEO SIGNAL PROCESSING METHOD, VIDEO SIGNAL PROCESSOR AND TELEVISION RECEIVER
摘要 PURPOSE:To accurately correct the position of a display image in accordance with the difference of each television(TV) system by varying the writing timing of a field memory correspondingly to a steady phase error generated in a PLL circuit in accordance with the difference of each TV system. CONSTITUTION:In a field double speed aspect conversion circuit 3, an input luminance signal Yin is written in the 1st field memory 12. Inputted color difference signals R-Yin, B-Yin are respectively written in field memories 22, 23. The circuit 3 includes a line clock PLL circuit 40, which generates a writing side system clock WCK and supplies the clock to respective memories 12, 22, 32. The writing timing of the memories 12, 22, 32 is changed correspondingly to a steady phase difference error generated in the circuit 40 due to the difference of each TV system.
申请公布号 JPH06326939(A) 申请公布日期 1994.11.25
申请号 JP19930113257 申请日期 1993.05.14
申请人 SONY CORP 发明人 YOSHIDA CHISATO
分类号 H04N3/27;H04N5/46;H04N9/00 主分类号 H04N3/27
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