发明名称 Non-volatile semiconductor memory having improved erasure characteristics
摘要 A floating gate is formed via a first gate insulating film over the channel region between source and drain regions which are formed in a semiconductor substrate. A control gate is formed via a second gate insulating film over the floating gate. A low impurity concentration semiconductor region is formed on the side of the control gate which faces the floating gate. When erasing, a depletion layer is produced in this low impurity concentration region and further saturates the erase characteristic for the erasure time by decreasing the capacitance between the control gate and the floating gate.
申请公布号 US5365098(A) 申请公布日期 1994.11.15
申请号 US19920963622 申请日期 1992.10.20
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 MIYAMOTO, JUNICHI;YOSHIKAWA, KUNIYOSHI;NARUKE, KIYOMI
分类号 H01L21/8247;H01L27/10;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L29/68;H01L29/78 主分类号 H01L21/8247
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