| 摘要 |
PURPOSE:To reduce the size, weight, and cost of a DRAM control circuit by directly connecting a pseudo SRAM to a microprocessor. CONSTITUTION:The DRAM control circuit uses an address discrimination circuit 30 which outputs an ordinary DRAM address area discriminating signal ADJD when the circuit 30 discriminates that an address A is in the ordinary address area of a DRAM or a pseudo SRAM address area discriminating signal ADJS to a pseudo SRAM control signal generation circuit 341A when the circuit 30 discriminates that the address A is in the address area of a pseudo SRAM and supplies the signal ADJD to a DRAM control signal generation circuit 342A or the signal ADJS to a pseudo SRAM control signal generation circuit 341A. Therefore, both a pseudo SRAM and ordinary DRAM can be connected to a microprocessor 10A and the size, weight, and cost of OA equipment, etc., can be reduced. |
