| 摘要 |
PURPOSE:To attain frame synchronization in a short time by accumulating timings of synchronizing signal detection for a predetermined period and detecting a timing of a synchronizing signal based on the result of accumulation so as to detect the synchronizing signal surely and quickly. CONSTITUTION:The receiver is provided with a synchronizing signal detection means 25 detecting a synchronizing signal and providing an output of a detection signal S1, and a counter 26 repeating a count AD1 or AD2 cyclicly sequentially in a bit period synchronously with a transmission signal D1, a memory circuit 28 recording accumulatingly the timings when the detection signal S1 is obtained by accumulating the detection signals S1 based on the result of the counts AD1, AD2 of the counter 26, and the transmission signal D1 is received synchronously with the synchronizing signal based on the result of accumulation recording by the memory circuit 28. When the frequency of detection of the synchronizing signals is reduced or detected in an erroneous timing, the timing of the synchronizing signal is correctly detected based on the result of accumulation recording by the memory circuit 28. Thus, frame synchronization is taken in a short time. |
